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Optical Chip-to-Chip Links in CMOS
MICS

Optical Chip-to-Chip Links in CMOS

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https://www.mics.caltech.edu/wp-content/uploads/2017/09/Screen-Shot-2017-09-18-at-5.06.32-PM-e1574222429981.png 347 353 awp-admin /wp-content/uploads/2017/10/mics-logo-grey-100.png awp-admin2016-01-09 19:55:322025-04-15 16:32:55Optical Chip-to-Chip Links in CMOS
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High-Speed Electrical & Optical Interconnects Research Projects

  • VCSEL driverJanuary 13, 2018 -
  • WDM-Based Energy Proportional Parallel Optical ReceiverJanuary 12, 2018 -
  • 3D-Integrated High-sensitivity Optical ReceiverJanuary 11, 2018 -
  • All-Digital Clock and Data RecoverySeptember 2, 2017 -
  • Low-Power Optical InterconnectsSeptember 2, 2017 -
  • Ultra-Low-Power Equalization and Crosstalk CancellationSeptember 2, 2017 -
  • MICS
    Optical Chip-to-Chip Links in CMOSJanuary 9, 2016 -

Research Topics

  • Silicon Photonics
  • High-Speed Electrical & Optical Interconnects
  • Biomedical Devices
  • Sub-Nyquist Signal Acquisition Systems
  • On-Chip Clocking and Communication
MICS Caltech

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California Institute of Technology
M/C 136-93
1200 East California Boulevard
Pasadena, California 91125
CaltechMICS@gmail.com
Our lab is in the third floor of Moore Laboratory.

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Link to: Dr. Shoaran invited to the 2015 Rising Stars in EECS workshop at MIT Link to: Dr. Shoaran invited to the 2015 Rising Stars in EECS workshop at MIT Dr. Shoaran invited to the 2015 Rising Stars in EECS workshop at MIT Link to: Abhinav Agarwal runner up in Graduate Student Council’s Teaching and Mentoring Awards 2016 Link to: Abhinav Agarwal runner up in Graduate Student Council’s Teaching and Mentoring Awards 2016 Abhinav Agarwal runner up in Graduate Student Council’s Teaching and Mentoring...
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