MICS

3D Nvigation for High-Precision Surgery

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A 3D localization system using magnetic field gradients that can replace X-Ray fluoroscopy in high precision surgery has been developed by our team. Monotonically varying magnetic fields encode spatial points uniquely in the field-of-view and are sensed by miniaturized devices with wireless power and data telemetry. Relative device locations are displayed in real-time. A prototype system consisting of a 65nm CMOS chip and gradient coils achieves a localization error of <100µm in 3D when tested in-vitro.

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Brain-Machine Interfaces

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Team Members: Benyamin A. Haghi, Sahil Shah, Spencer Kellis from Richard Andersen’s lab.

In the United States, there are about 17,700 new cases per year of Spinal Cord Injury (SCI). SCI results in a partial or total loss of motor function. Brain-Machine Interfaces (BMI) have the potential to increase independence and improve quality of life in SCI patients by reading out neural signals and mapping them onto control signals for assistive devices.

BMI systems serve as an interface between the cortex and peripheral devices and hence they need to be robust over time in the face of different sources of variability. For example, electric potentials in the cortex have small amplitudes and are susceptible to noise, and electrical and mechanical properties of implanted microelectrodes change over time. Neuronal populations may also change over time. Hence, the decoders designed for a BMI system should be able to generalize across these sources of variability to accurately infer movement commands from changing neural signals.

In addition, almost all existing BMI systems run on a desktop computer consuming several watts of power (a typical desktop consumes 60 to 300 watts of power). Such a system is not optimized for real-time processing outside of a clinical setting. Hence, the need for a robust and efficient learning system implemented on an ASIC. Moreover, the algorithms used for such a BMI system have assumed a linear relation between inputs and outputs (e.g., Kalman filters or Wiener filters). In recent years, due to progress made in machine learning and neural networks, there has been an increased interest in adopting these novel techniques for BMI applications. With enough training data, these powerful machine learning algorithms could generalize over large variations in the recorded data.

Our group in collaboration with Richard Andersen’s Lab propose to develop a BMI system which efficiently maps neuronal signal to kinematics in a resource-constrained environment. Figure 1 shows a top-level block diagram of our BMI system.

In our recent work [4] we use neural and behavioral data collected during the open-loop phase of a 2D center-out brain-control task. In this phase of the task, a cursor moves under computer control, with a minimum-jerk velocity profile, from the center of a computer screen to one of eight different target locations arranged uniformly around a unit circle, while the subject uses motor imagery to imagine controlling the cursor. Data is collected in three-minute blocks, each block consisting of 53 trials, with a pseudorandom uniform distribution of targets across trials.

This data is used to train several neural networks. Specifically, a Recurrent Neural Network (RNN), which have shown promising results for sequential data were used. An RNN is composed of feedforward network as well as a feedback network, meaning that all previous outputs are integrated to predict the next time-step RNNs also use previous time step’s input data when computing a new prediction.

While these algorithms are powerful in their capacity to capture complex relationships, they currently require power-hungry computational resources to operate. Part of making BMI systems clinically relevant is to design and develop size- and power-efficient hardware for decoding kinematics such that these systems can be implanted or worn on the body. One of the directions being investigated involves exploring such novel algorithms and energy-efficient hardware.

 

 

References

  1. B. A. Haghi, S. Kellis, S. Shah, M. Ashok, L. Bashford, D. Kramer, B. Lee, Ch. Liu, R. A. Andersen, and A. Emami, “ Deep Multi-State Dynamic Recurrent Neural Networks Operating on Wavelet Based Neural Features for Robust Brain Machine Interfaces”, 2019 Thirty-third Conference on Neural Information Processing Systems (NeurIPS 2019), 2019, Vancouver, Canada.
    [ PDF ]
  2. B. Haghi, S. Kellis, M. Ashok, S. Shah, L. Bashford, D. Kramer, B. Lee, C. Liu, R. Andersen, A. Emami, “ Deep multi-state dynamic recurrent neural networks for robust brain-machine interfaces”, Program No. 406.04. 2019 Neuroscience Meeting Planner. Chicago, IL: Society for Neuroscience, 2019. Online.
    [ Abstract ]
  3. Benyamin Haghi, Spencer Kellis, Luke Bashford, Sahil Shah, Daniel Kramer, Brian Lee, Charles Liu, Richard Andersen and Azita Emami “Robust Learning Algorithms for Brain Machine Interfaces” IEEE Brain Initiative Workshop on Advanced NeuroTechnologies 2018.
  4. Sahil Shah, Benyamin Haghi, Spencer Kellis, Luke Bashford, Daniel Kramer, Brian Lee, Charles Liu, Richard Andersen and Azita Emami “Decoding Kinematics from Human Parietal Cortex using Neural Networks” International IEEE EMBS Conference on Neural Engineering (Accepted)

Neural Interfaces

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Neural interfaces are generally categorized as systems which enable direct communication between the cortex and an external device. Such systems could be used for monitoring and treating neurological disorders like epilepsy, studying and treating neurodegenerative disorders and also for allowing tetraplegic patients to control neuroprosthetic devices. Neural Interfaces will play a vital role in restoring sensory function, communications, and control in impaired humans. Designing low-power circuits and efficient algorithms are essential parts of making these systems robust and wearable.

With respect to Neural Interfaces, our lab focuses on three main areas of research:

Brain-Machine Interfaces

Closed-Loop Seizure Control

Adaptive Deep Brain Stimulation for Parkinson Disease

 

 

Adaptive Deep Brain Stimulation for Parkinson Disease

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Team Members: Taige Wang, Maha Shoaran, Benyamin A. Haghi

Parkinson’s disease (PD) is the second most common neurodegenerative disorder after Alzheimer’s, with a growing patient population of over 6 million globally. PD mainly affects the motor system, resulting in movement impairments such as muscle rigidity, resting tremor and akinesia. In the early stage, levodopa medication is the most frequently used therapy. Its effectiveness, however, diminishes as the disease progresses and non-dopaminergic brain regions get involved, when surgery-based treatments become inevitable.

Deep Brain Stimulation (DBS) is an established therapy for advanced Parkinson’s disease (PD). It usually targets either the subthalamic nucleus (STN) or internal globus pallidus (GPi) with a constant high-frequency stimulation. DBS leads to an immediate reduction in clinical impairment and improves the UPDRS (Unified Parkinson Disease Rating Scale) motor scores in the long term.

Despite the success of continuous (i.e. open-loop) DBS, its efficacy is limited due to complex programming process, induced side effects, and extensive battery usage. The effectiveness of DBS is highly sensitive to the stimulation parameters such as frequency, pulse width, and intensity, which may take a trained clinician over 6 months to program. In addition, DBS has well known side effects such as speech difficulties and depression, since the normal physiological communication is somewhat suppressed by the stimulation current.

Recent studies have applied the closed-loop control (adaptive DBS or aDBS) using feedback from local field potential (LFP) signals. Despite the success of proof-of-principle studies, aDBS still faces many challenges on its way to clinical therapy. Limited feedback signals and control algorithms, in addition to lack of optimization are among the major obstacles. As an illustration, current aDBS practices focus on simple feedback like beta band power and thresholding, without optimized control or classification algorithms. However, several studies show that beta power in the STN doesn’t correlate with tremor, which suggests that aDBS with only beta power may not properly control all the symptoms. To include more features under extreme hardware resource constraints imposed by the implantable aDBS system, we need to carefully select a set of features with balanced performance and computational resource requirements.

In our group, we study the accuracy of several classifiers. By including relevant features other than beta power, an improvement in accuracy is achieved.  These recent results suggest a great potential to improve current aDBS system for PD, by implementing a classifier with multiple features.

We use state-of-the-art machine learning technique and we study the capacity of several classifiers to face these challenges and investigate the first online motor impairment prediction method. Though some aDBS practices have successfully combined beta activity with inertial sensor or neurochemical recordings as feedback, we focus on the critical information contained in LFPs to avoid the use of additional sensors, lower the power consumption, and achieve reliability.

By including relevant features other than beta power, an improvement in accuracy is achieved.  We test our motor impairment prediction algorithm on each patient. Fig.1 shows some of our recent results. These recent results suggest a great potential to improve current aDBS system for PD, by implementing a classifier with multiple features.

      References

  1. T. Wang, M. Shoaran, and A. Emami, “Toward Adaptive Deep Brain Stimulation in Parkinson’s Disease: LFP-Based Feature Analysis and Classification”, IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP), 2018

Closed-Loop Seizure Control

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Team Members: Mahsa Shoaran, Benyamin A. Haghi, Milad Taghavi, Masoud Farivar

Epilepsy is a common neurological disorder affecting over 50 million people in the world. Approximately one third of epileptic patients exhibit seizures that are not controlled by medication. Despite substantial innovations in anti-seizure drug therapy, the proportion of patients with uncontrolled epilepsy has not changed, emphasizing the need for new treatment strategies. The development of new devices capable of performing a rapid and reliable seizure detection followed by brain stimulation holds great promises for improving the quality of life of millions of people with epileptic seizures worldwide.

The high density of neurons in neurobiological tissue requires a large number of electrodes to obtain the most accurate representation of neural activity and provide better control over the location of the stimulation sites or resected epileptic tissue. However, integrating hundreds of acquisition channels at relatively high sampling rates on-chip requires some type of data compression within the sensors to comply with the stringent bandwidth limitations for wireless transmission. In addition, a small size of the implantable system is critical to minimize potential clinical issues associated with implantation, while the total power consumption should be minimized to avoid heat generation inside the brain.

We investigated and evaluated common machine learning methods with focus on hardware complexity and overall performance. We recently developed a closed-loop seizure detection and prevention system. Combined with a novel and efficient feature extraction model, we showed that these classifiers quickly become competitive with more complex learning models, with only a small number of low-depth shallow decision trees. Fig.1 and Fig.3 show the proposed classifier which is fabricated in a 65nm TSMC process, consuming 41.2 nJ/class in a total area of 5401850. It supports 32 iEEG channels, and major frequency and time domain features (such as line length and different frequency bands). The proposed architecture is evaluated in automated seizure detection for epilepsy, using 3074 hours of intracranial EEG data from 26 patients with 393 seizures. Fig.2 show the performance evaluation of the algorithm. Fig.2a shows the average performance vs. number and depth of trees. Fig.2b show the average performance of different classifiers on different patients using iEEG data. Fig.2c shows the feature importance. Finally, latency of the algorithm vs. patient number has been shown on fig.2d. This patient-specific and energy-quality scalable classifier holds great promise for low-power sensor data classification in biomedical applications.

      References

  • Shoaran, B. A. Haghi, M. Taghavi, M. Farivar, and A. Emami, “Energy-Efficient Classification for Resource-Constrained Biomedical Applications”, IEEE Journal on Emerging and Selected  Topics in Circuit and Systems, DOI 10.1109/JETCAS.2018.2844733
  • Taghavi, B. A. Haghi, M. Shoaran, M. Farivar, and A. Emami, “A 41.2 nJ/class, 32-channel on-chip classifier for epileptic seizure detection,” Int. Conf. IEEE Eng. Medicine and Biology Society (EMBC), 2018.
  • Shoaran, B. A. Haghi, M. Farivar, A. Emami, “Efficient Feature Extraction and Classification Methods in Neural Interfaces,” the Bridge, National Academy of Engineering, vol. 47, no. 4, pp. 31-35, Winter 2017.
On-Chip Communication Networks and Clocking

Wideband Injection Locking and Quadrature Phase Generation

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Injection-locked-oscillators (ILOs) have been used extensively because of their simple implementation and instantaneous locking characteristics. However, their application is hindered by their limited locking range compared with alternative techniques such as PLLs. In this project, PLL and injection locking elements are combined symbiotically to achieve wide locking range while retaining the simplicity of the latter.

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Low-power First-order Frequency Synthesizer

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Clock multipliers play a key role in design of high-speed electrical and optical links. As the aggregate bandwidth requirement for chip-to-chip interconnects grows, their respective frequency of operation increases. In this project a first order frequency synthesizer is presented that is suitable for high-speed on-chip clock generation. In this architecture the rising edge of the reference clock is directly injected to the output clock, resetting jitter accumulation similar to an MDLL.

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On-Chip Interconnects

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Our goal in this project is to take a close look at on-chip wires scaling and investigate the challenges of on-chip signaling in highly-scaled technologies. Novel techniques to mitigate these challenges in a power and area efficient manner are introduced.

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VCSEL driver

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Team Members: Mayank Raj and Manuel Monge

Increasing bandwidth requirements have pushed the traditionally electrical wireline interconnects within computing systems and data centers to their limits. As data-rates scale, the shortcomings of electrical channels are becoming more severe. Technology scaling favors I/O circuit performance, but the bandwidth of electrical channels does not scale with the same trend. Several receiver and transmitter equalization techniques have been proposed to overcome this bandwidth limitation. However, these compensation techniques consume considerable power and die area, and, as a result, current high-speed I/O link designs are increasingly becoming power and channel-limited.

The lab has worked on an ultralow-power VCSEL transmitter in 32 nm SOI CMOS. To increase its power efficiency, the VCSEL is driven at a low bias current. Driving the VCSEL in this condition increases its inherent nonlinearity. Conventional pre-emphasis techniques cannot compensate for this effect because they have a linear response. To overcome this limitation, a nonlinear equalization scheme is proposed. A dynamic VCSEL modeling technique is used to generate the time-domain optical responses for “one” and “zero” bits. Based on the asymmetry of the two responses, the rising and falling edges are equalized separately. Additionally, instead of using fixed bit delays, the equalization delay is selected based on the bias current of the VCSEL. The efficiency of the proposed modeling and equalization technique is evaluated through simulations and measurements. The transmitter achieves energy efficiency of 0.77 pJ/b at 20 Gb/s and occupies 100 µm × 60 µm active silicon area.

Related Publication

Mayank Raj, Manuel Monge, Azita Emami “A Modelling and Nonlinear Equalization Technique for a 20 Gb/s 0.77 pJ/b VCSEL Transmitter in 32 nm SOI CMOS,” IEEE Journal of Solid-State Circuits, vol.51, no.8, pp.1734 – 1743, July. 2016

[ PDF ]

Location-Broadcasting Chips

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We present an alternative approach to microscale device localization based on concepts from nuclear magnetic resonance. In particular, the magnetic-field-dependent precession frequency of nuclear spins allows their location in space to be encoded through the application of magnetic field gradients. This allows MRI to visualize signals from nuclear spins located throughout a specimen with ~100 µm resolution.

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