An 18.6Gb/s Double-Sampling Receiver in 65nm CMOS for Ultra Low-power Optical Communication March 1, 2012/in Low-Power Optical Interconnects /by awp-admin /wp-content/uploads/2017/10/mics-logo-grey-100.png 0 0 awp-admin /wp-content/uploads/2017/10/mics-logo-grey-100.png awp-admin2012-03-01 07:51:222017-09-02 13:15:57An 18.6Gb/s Double-Sampling Receiver in 65nm CMOS for Ultra Low-power Optical Communication
