A 60-Gb/s PAM4 Wireline Receiver With 2-Tap Direct Decision Feedback Equalization Employing Track-and-Regenerate Slicers in 28-nm CMOS November 12, 2020/in /by Arian Hashemi /wp-content/uploads/2017/10/mics-logo-grey-100.png 0 0 Arian Hashemi /wp-content/uploads/2017/10/mics-logo-grey-100.png Arian Hashemi2020-11-12 19:24:442024-01-12 19:22:38A 60-Gb/s PAM4 Wireline Receiver With 2-Tap Direct Decision Feedback Equalization Employing Track-and-Regenerate Slicers in 28-nm CMOS
