A 60-Gb/s PAM4 Wireline Receiver with 2-Tap Direct Decision Feedback Equalization Employing Track-and-Regenerate Slicers in 28-nm CMOS February 25, 2020/in /by Arian Hashemi /wp-content/uploads/2017/10/mics-logo-grey-100.png 0 0 Arian Hashemi /wp-content/uploads/2017/10/mics-logo-grey-100.png Arian Hashemi2020-02-25 22:11:562024-01-12 19:13:19A 60-Gb/s PAM4 Wireline Receiver with 2-Tap Direct Decision Feedback Equalization Employing Track-and-Regenerate Slicers in 28-nm CMOS
