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Selected Publications

Optical Transceivers

S. Saeedi, S. Menezo and A. Emami, "A 25Gbps 3D-Integrated CMOS/Silicon Photonic Optical Receiver with -15dBm Sensitivity and 0.17pJ/bit Energy Efficiency", accepted to IEEE Optical Interconnect Conference (OIC), 2015

M. Raj, S. Saeedi, A. Emami, "A 4-to-11GHz Injection-Locked Quarter-Rate Clocking for an Adaptive 153fJ/b Optical Receiver in 28nm FDSOI CMOS", IEEE International Solid-State Circuits Conference (ISSCC), Feb. 2015

S. Saeedi, A. Emami, "A 25Gb/s 170μW/Gb/s High-Sensitivity Optical Receiver in 28nm CMOS for Low-power Optical Communication", IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 2014

M. Honarvar, A. Emami-Neyestanak, "24-Gb/s Double-Sampling Receiver for Ultra-Low-Power Optical Communication", IEEE Journal of Solid-State Circuits, vol.48, no.2, pp.344-357, Feb. 2013

M. Honarvar, A. Emami-Neyestanak, "Ultra Low-Power Receiver Design for Dense Optical Interconnects", IEEE Optical Interconnects Conference (OIC), vol., no., pp.115-116, 20-23 May 2012

M. Honarvar, A. Emami-Neyestanak, "An 18.6Gb/s Double-Sampling Receiver in 65nm CMOS for Ultra Low-power Optical Communication", International Solid-State Cicruits Conference (ISSCC), 2012

S. Palermo, A. Emami-Neyestanak, M. Horowitz, "A 90nm CMOS 16Gb/sTransceiver for Optical Interconnects", IEEE Journal of Solid-State Circuits, vol.43, no.5, pp.1235-1246, May 2008

S. Palermo, A. Emami-Neyestanak, M. Horowitz, "A 90nm CMOS 16Gb/s Transceiver for Optical Interconnects", IEEE International Solid-State Circuits Conference (ISSCC), Digest of tech. papers, 2007

D. Miller, A. Bhatnagar, S. Palermo, A. Emami-Neyestanak, M. Horowitz, "Opportunities for Optics in Integrated Circuits Application", IEEE International Solid-State Circuits Conference (ISSCC), 2005

A. Emami-Neyestanak, S. Palermo, H. Lee and M. Horowitz, "CMOS Transceiver with Baud Rate Clock Recovery for Optical Interconnects", IEEE Symposium on VLSI Circuits, June 2004

A. Emami-Neyestanak, D. Liu, G. Keeler, N. Helman and M. Horowitz, "A 1.6 Gbps, 3mW CMOS Receiver for Optical Communication", IEEE Symposium on VLSI Circuits, June 2002, pages 84-87

Wireline Transceivers

M. Honarvar, A. Emami-Neyestanak, "A 20GB/s 136fJ/b 12.5Gb/s/μm On-Chip Link in 28nm CMOS", IEEE Radio Frequency Integrated Circuits Symposium (RFIC), vol., no., 2-4 June 2013

M. Honarvar, A. Emami-Neyestanak, "A Low-Power 20Gb/s Transmitter in 65nm CMOS Technology", IEEE Radio Frequency Integrated Circuits Symposium (RFIC), vol., no., pp.149-152, 17-19 June 2012

M. Honarvar, A. Emami-Neyestanak, "A 15-Gb/s 0.5-mW/Gbps Two-Tap DFE Receiver With Far-End Crosstalk Cancellation", IEEE Journal of Solid-State Circuits, vol.47, no.10, pp.2420-2432, Oct. 2012

M. Honarvar, A. Emami-Neyestanak, "A 15Gb/s 0.5mW/Gb/s 2-Tap DFE Receiver with Far-End Crosstalk Cancellation", International Solid-State Cicruits Conference (ISSCC), 2011

M. Loh, A. Emami, "All-Digital CDR for High-Density, High-Speed I/O", IEEE Symposium on VLSI Circuits, 2010

A. Emami-Neyestanak, A. Varzaghani, J. Bulzacchelli, A. Rylyakov, C.-K.K. Yang and Daniel Friedman "A 6.0 mW, 10.0 Gb/s Receiver with Switched-Capacitor Summation DFE,"(Invited) IEEE Journal of Solid-State Circuits, vol.42, no.4, pp.889-896, April 2007

A. Emami-Neyestanak, A. Varzaghani, J. Bulzacchelli, A. Rylyakov, C.-K.K. Yang, D. Friedman, "A Low-Power Receiver with Switched-Capacitor Summation DFE" IEEE Symposium on VLSI Circuits, Digest of tech. papers, 2006

Clocking and Synchronization

M. Raj, S. Saeedi, A. Emami, "A 4-to-11GHz Injection-Locked Quarter-Rate Clocking for an Adaptive 153fJ/b Optical Receiver in 28nm FDSOI CMOS", IEEE International Solid-State Circuits Conference (ISSCC), Feb. 2015

S. Saeedi, A. Emami, "An 8GHz First-order Frequency Synthesizer based on Phase Interpolation and Quadrature Frequency Detection in 65nm CMOS", IEEE Custom Integrated Circuits Conference (CICC), 2014

M. Raj, A. Emami, "A Wideband Injection Locking Scheme and Quadrature Phase Generation in 65nm CMOS,"(Invited) IEEE Transactions on Microwave Theory and Techniques, vol.62, no.4, pp.763-772, Apr. 2014

M. Raj, A. Emami-Neyestanak, "A Wideband Injection Locking Scheme and Quadrature Phase Generation in 65nm CMOS", IEEE Radio Frequency Integrated Circuits Symposium (RFIC), vol., no., 2-4 June 2013

M. Loh, A. Emami-Neyestanak, "A 3x9 Gb/s Shared, All-Digital CDR for High-Speed, High-Density I/O", IEEE Journal of Solid-State Circuits, vol.47, no.3, March 2012

M. Loh, A. Emami, "All-Digital CDR for High-Density, High-Speed I/O", IEEE Symposium on VLSI Circuits, 2010

S. Palermo, A. Emami-Neyestanak, M. Horowitz, "A 90nm CMOS 16Gb/sTransceiver for Optical Interconnects", IEEE Journal of Solid-State Circuits, vol.43, no.5, pp.1235-1246, May 2008

A. Emami-Neyestanak, S. Palermo, H. Lee and M. Horowitz, "CMOS Transceiver with Baud Rate Clock Recovery for Optical Interconnects", IEEE Symposium on VLSI Circuits, June 2004

Implantable Biomedical Devices

M. Loh, A. Emami, "Capacitive Proximity Communication with Distributed Alignment Sensing for Origami Biomedical Implants", accepted to IEEE Journal of Solid-State Circuits

M. Monge, A. Emami, "Design Considerations for High-Density Fully Intraocular Epiretinal Prostheses,"(Invited) IEEE Biomedical Circuits and Systems Conference (BIOCAS), 2014

M. Monge, M. Raj, M. Honorvar-Nazari, H.C. Chang, Y. Zhao, J. Weiland, M. Humayun, Y.C. Tai, A. Emami, "A Fully Intraocular High-Density Self-Calibrating Epiretinal Prosthesis,"(Invited) IEEE Transactions on Biomedical Circuits and Systems, vol.7, no.6, pp.747-760, Dec. 2013

M. Loh, A. Emami-Neyestanak, "Capacitive Proximity Communication with Distributed Alignment Sensing for Origami Biomedical Implants", IEEE Custom Integrated Circuits Conference (CICC), 2013

Y. Liu, J. Park, YC tai, R. Lang, A. Emami-Neyestanak, S. Pellegrino and M. Humayun, "Parylene Origami Structure for Intraocular Implantation", IEEE Transducers Conference, 2013

M. Monge, M. Raj, M. Honorvar-Nazari, H.C. Chang, Y. Zhao, J. Weiland, M. Humayun, Y.C. Tai, A. Emami-Neyestanak, "A Fully Intraocular 0.0169mm2/pixel 512-Channel Self-Calibrating Epiretinal Prosthesis in 65nm CMOS", IEEE International Solid-State Circuits Conference (ISSCC), Feb. 2013

J. Chang, Y. Liu, D. Kang, M. Monge, Y. Zhao, C.C. Yu, A. Emami-Neyestanak, J. Weiland, M. Humayun, Y.C. Tai, "Packaging Study for a 512-Channel Intraocular Epiretinal Implant", IEEE International Conference on Micro Electro Mechanical Systems(MEMS), Jan. 2013

Signal Acquisition Beyond Nyquist rate

J. Yoo, C. Turnes, E. Nakamura, C. Le, S. Becker, E. Sovero, M. Wakin, M. Grant, J. Romberg, A. Emami-Neyestanak, and E. Candès, "A Compressed Sensing Parameter Extraction Platform for Radar Pulse Signal Acquisition", IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS), vol.2, no.3, pp.626-638, Sept. 2012

M. Wakin, S. Becker, E. Nakamura, M. Grant, E. Sovero, D. Ching, J. Yoo, J. Romberg, A. Emami-Neyestanak, and E. Candès, "A Nonuniform Sampler for Wideband Spectrally-Sparse Environments", IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS), vol.2, no.3, pp.516-529, Sept. 2012

J. Yoo, S. Becker, M. Loh, M. Monge, E. Candès, A. Emami-Neyestanak, "A 100MHz-2GHz 12.5x sub-Nyquist Rate Receiver in 90nm CMOS", IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 2012

J. Yoo, S. Becker, M. Loh, M. Monge, E. Candès, A. Emami-Neyestanak, "Design and Implementation of a Fully Integrated Compressed-Sensing Signal Acquisition System", IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP), 2012

J. Yoo, A. Khajehnejad, B. Hassibi, A. Emami-Neyestanak "An Analog Sub-Linear Time Sparse Signal Acquisition Framework Based on Structured Matrices", IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP), 2012

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